提供基本的ttl测试用例
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  1. // Copyright (c) 2011 The LevelDB Authors. All rights reserved.
  2. // Use of this source code is governed by a BSD-style license that can be
  3. // found in the LICENSE file. See the AUTHORS file for names of contributors.
  4. // AtomicPointer provides storage for a lock-free pointer.
  5. // Platform-dependent implementation of AtomicPointer:
  6. // - If the platform provides a cheap barrier, we use it with raw pointers
  7. // - If cstdatomic is present (on newer versions of gcc, it is), we use
  8. // a cstdatomic-based AtomicPointer. However we prefer the memory
  9. // barrier based version, because at least on a gcc 4.4 32-bit build
  10. // on linux, we have encountered a buggy <cstdatomic>
  11. // implementation. Also, some <cstdatomic> implementations are much
  12. // slower than a memory-barrier based implementation (~16ns for
  13. // <cstdatomic> based acquire-load vs. ~1ns for a barrier based
  14. // acquire-load).
  15. // This code is based on atomicops-internals-* in Google's perftools:
  16. // http://code.google.com/p/google-perftools/source/browse/#svn%2Ftrunk%2Fsrc%2Fbase
  17. #ifndef PORT_ATOMIC_POINTER_H_
  18. #define PORT_ATOMIC_POINTER_H_
  19. #include <stdint.h>
  20. #ifdef LEVELDB_CSTDATOMIC_PRESENT
  21. #include <cstdatomic>
  22. #endif
  23. #ifdef OS_WIN
  24. #include <windows.h>
  25. #endif
  26. #ifdef OS_MACOSX
  27. #include <libkern/OSAtomic.h>
  28. #endif
  29. #if defined(_M_X64) || defined(__x86_64__)
  30. #define ARCH_CPU_X86_FAMILY 1
  31. #elif defined(_M_IX86) || defined(__i386__) || defined(__i386)
  32. #define ARCH_CPU_X86_FAMILY 1
  33. #elif defined(__ARMEL__)
  34. #define ARCH_CPU_ARM_FAMILY 1
  35. #endif
  36. namespace leveldb {
  37. namespace port {
  38. // Define MemoryBarrier() if available
  39. // Windows on x86
  40. #if defined(OS_WIN) && defined(COMPILER_MSVC) && defined(ARCH_CPU_X86_FAMILY)
  41. // windows.h already provides a MemoryBarrier(void) macro
  42. // http://msdn.microsoft.com/en-us/library/ms684208(v=vs.85).aspx
  43. #define LEVELDB_HAVE_MEMORY_BARRIER
  44. // Gcc on x86
  45. #elif defined(ARCH_CPU_X86_FAMILY) && defined(__GNUC__)
  46. inline void MemoryBarrier() {
  47. // See http://gcc.gnu.org/ml/gcc/2003-04/msg01180.html for a discussion on
  48. // this idiom. Also see http://en.wikipedia.org/wiki/Memory_ordering.
  49. __asm__ __volatile__("" : : : "memory");
  50. }
  51. #define LEVELDB_HAVE_MEMORY_BARRIER
  52. // Sun Studio
  53. #elif defined(ARCH_CPU_X86_FAMILY) && defined(__SUNPRO_CC)
  54. inline void MemoryBarrier() {
  55. // See http://gcc.gnu.org/ml/gcc/2003-04/msg01180.html for a discussion on
  56. // this idiom. Also see http://en.wikipedia.org/wiki/Memory_ordering.
  57. asm volatile("" : : : "memory");
  58. }
  59. #define LEVELDB_HAVE_MEMORY_BARRIER
  60. // Mac OS
  61. #elif defined(OS_MACOSX)
  62. inline void MemoryBarrier() {
  63. OSMemoryBarrier();
  64. }
  65. #define LEVELDB_HAVE_MEMORY_BARRIER
  66. // ARM
  67. #elif defined(ARCH_CPU_ARM_FAMILY)
  68. typedef void (*LinuxKernelMemoryBarrierFunc)(void);
  69. LinuxKernelMemoryBarrierFunc pLinuxKernelMemoryBarrier __attribute__((weak)) =
  70. (LinuxKernelMemoryBarrierFunc) 0xffff0fa0;
  71. inline void MemoryBarrier() {
  72. pLinuxKernelMemoryBarrier();
  73. }
  74. #define LEVELDB_HAVE_MEMORY_BARRIER
  75. #endif
  76. // AtomicPointer built using platform-specific MemoryBarrier()
  77. #if defined(LEVELDB_HAVE_MEMORY_BARRIER)
  78. class AtomicPointer {
  79. private:
  80. void* rep_;
  81. public:
  82. AtomicPointer() { }
  83. explicit AtomicPointer(void* p) : rep_(p) {}
  84. inline void* NoBarrier_Load() const { return rep_; }
  85. inline void NoBarrier_Store(void* v) { rep_ = v; }
  86. inline void* Acquire_Load() const {
  87. void* result = rep_;
  88. MemoryBarrier();
  89. return result;
  90. }
  91. inline void Release_Store(void* v) {
  92. MemoryBarrier();
  93. rep_ = v;
  94. }
  95. };
  96. // AtomicPointer based on <cstdatomic>
  97. #elif defined(LEVELDB_CSTDATOMIC_PRESENT)
  98. class AtomicPointer {
  99. private:
  100. std::atomic<void*> rep_;
  101. public:
  102. AtomicPointer() { }
  103. explicit AtomicPointer(void* v) : rep_(v) { }
  104. inline void* Acquire_Load() const {
  105. return rep_.load(std::memory_order_acquire);
  106. }
  107. inline void Release_Store(void* v) {
  108. rep_.store(v, std::memory_order_release);
  109. }
  110. inline void* NoBarrier_Load() const {
  111. return rep_.load(std::memory_order_relaxed);
  112. }
  113. inline void NoBarrier_Store(void* v) {
  114. rep_.store(v, std::memory_order_relaxed);
  115. }
  116. };
  117. // We have neither MemoryBarrier(), nor <cstdatomic>
  118. #else
  119. #error Please implement AtomicPointer for this platform.
  120. #endif
  121. #undef LEVELDB_HAVE_MEMORY_BARRIER
  122. #undef ARCH_CPU_X86_FAMILY
  123. #undef ARCH_CPU_ARM_FAMILY
  124. } // namespace leveldb::port
  125. } // namespace leveldb
  126. #endif // PORT_ATOMIC_POINTER_H_