XOY-Leveldb

小组成员：谢瑞阳、徐翔宇

costan ea175e28f8 Implement support for Intel crc32 instruction (SSE 4.2) This change authored by vadimskipin and submitted via: https://github.com/google/leveldb/pull/309 Changes made to support iOS builds and other architectures without support for SSE 4.2. db_bench reports original crc32 speed at: crc32c : 3.610 micros/op; 1082.0 MB/s (4K per op) with this change performance has increased to: crc32c : 0.843 micros/op; 4633.6 MB/s (4K per op) ------------- Created by MOE: https://github.com/google/moe MOE_MIGRATED_REVID=148694935			7年前
..
win	reverting disastrous MOE commit, returning to r21	删除	13年前
README	reverting disastrous MOE commit, returning to r21		13年前
atomic_pointer.h	Fix Android/MIPS build.		10年前
port.h	Remove static initializer; fix endian-ness detection; fix build on		12年前
port_example.h	Implement support for Intel crc32 instruction (SSE 4.2)		7年前
port_posix.cc	Including atomic_pointer.h in port_posix		9年前
port_posix.h	Implement support for Intel crc32 instruction (SSE 4.2)		7年前
port_posix_sse.cc	Implement support for Intel crc32 instruction (SSE 4.2)		7年前
thread_annotations.h	Release 1.18		10年前

README

This directory contains interfaces and implementations that isolate the
rest of the package from platform details.

Code in the rest of the package includes "port.h" from this directory.
"port.h" in turn includes a platform specific "port_<platform>.h" file
that provides the platform specific implementation.

See port_posix.h for an example of what must be provided in a platform
specific header file.