小组成员:谢瑞阳、徐翔宇
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125 regels
3.3 KiB

  1. // Copyright 2016 The LevelDB Authors. All rights reserved.
  2. // Use of this source code is governed by a BSD-style license that can be
  3. // found in the LICENSE file. See the AUTHORS file for names of contributors.
  4. //
  5. // A portable implementation of crc32c, optimized to handle
  6. // four bytes at a time.
  7. //
  8. // In a separate source file to allow this accelerated CRC32C function to be
  9. // compiled with the appropriate compiler flags to enable x86 SSE 4.2
  10. // instructions.
  11. #include <stdint.h>
  12. #include <string.h>
  13. #include "port/port.h"
  14. #if defined(LEVELDB_PLATFORM_POSIX_SSE)
  15. #if defined(_MSC_VER)
  16. #include <intrin.h>
  17. #elif defined(__GNUC__) && defined(__SSE4_2__)
  18. #include <nmmintrin.h>
  19. #include <cpuid.h>
  20. #endif
  21. #endif // defined(LEVELDB_PLATFORM_POSIX_SSE)
  22. namespace leveldb {
  23. namespace port {
  24. #if defined(LEVELDB_PLATFORM_POSIX_SSE)
  25. // Used to fetch a naturally-aligned 32-bit word in little endian byte-order
  26. static inline uint32_t LE_LOAD32(const uint8_t *p) {
  27. // SSE is x86 only, so ensured that |p| is always little-endian.
  28. uint32_t word;
  29. memcpy(&word, p, sizeof(word));
  30. return word;
  31. }
  32. // Used to fetch a naturally-aligned 64-bit word in little endian byte-order
  33. static inline uint64_t LE_LOAD64(const uint8_t *p) {
  34. uint64_t dword;
  35. memcpy(&dword, p, sizeof(dword));
  36. return dword;
  37. }
  38. static inline bool HaveSSE42() {
  39. #if defined(_MSC_VER)
  40. int cpu_info[4];
  41. __cpuid(cpu_info, 1);
  42. return (cpu_info[2] & (1 << 20)) != 0;
  43. #elif defined(__GNUC__)
  44. unsigned int eax, ebx, ecx, edx;
  45. __get_cpuid(1, &eax, &ebx, &ecx, &edx);
  46. return (ecx & (1 << 20)) != 0;
  47. #else
  48. return false;
  49. #endif
  50. }
  51. #endif // defined(LEVELDB_PLATFORM_POSIX_SSE)
  52. // For further improvements see Intel publication at:
  53. // http://download.intel.com/design/intarch/papers/323405.pdf
  54. uint32_t AcceleratedCRC32C(uint32_t crc, const char* buf, size_t size) {
  55. #if !defined(LEVELDB_PLATFORM_POSIX_SSE)
  56. return 0;
  57. #else
  58. static bool have = HaveSSE42();
  59. if (!have) {
  60. return 0;
  61. }
  62. const uint8_t *p = reinterpret_cast<const uint8_t *>(buf);
  63. const uint8_t *e = p + size;
  64. uint32_t l = crc ^ 0xffffffffu;
  65. #define STEP1 do { \
  66. l = _mm_crc32_u8(l, *p++); \
  67. } while (0)
  68. #define STEP4 do { \
  69. l = _mm_crc32_u32(l, LE_LOAD32(p)); \
  70. p += 4; \
  71. } while (0)
  72. #define STEP8 do { \
  73. l = _mm_crc32_u64(l, LE_LOAD64(p)); \
  74. p += 8; \
  75. } while (0)
  76. if (size > 16) {
  77. // Process unaligned bytes
  78. for (unsigned int i = reinterpret_cast<uintptr_t>(p) % 8; i; --i) {
  79. STEP1;
  80. }
  81. // _mm_crc32_u64 is only available on x64.
  82. #if defined(_M_X64) || defined(__x86_64__)
  83. // Process 8 bytes at a time
  84. while ((e-p) >= 8) {
  85. STEP8;
  86. }
  87. // Process 4 bytes at a time
  88. if ((e-p) >= 4) {
  89. STEP4;
  90. }
  91. #else // !(defined(_M_X64) || defined(__x86_64__))
  92. // Process 4 bytes at a time
  93. while ((e-p) >= 4) {
  94. STEP4;
  95. }
  96. #endif // defined(_M_X64) || defined(__x86_64__)
  97. }
  98. // Process the last few bytes
  99. while (p != e) {
  100. STEP1;
  101. }
  102. #undef STEP8
  103. #undef STEP4
  104. #undef STEP1
  105. return l ^ 0xffffffffu;
  106. #endif // defined(LEVELDB_PLATFORM_POSIX_SSE)
  107. }
  108. } // namespace port
  109. } // namespace leveldb