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310 rader
9.0 KiB
310 rader
9.0 KiB
#ifndef __LIBS_X86_H__
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#define __LIBS_X86_H__
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#include <defs.h>
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#define do_div(n, base) ({ \
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unsigned long __upper, __low, __high, __mod, __base; \
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__base = (base); \
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asm ("" : "=a" (__low), "=d" (__high) : "A" (n)); \
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__upper = __high; \
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if (__high != 0) { \
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__upper = __high % __base; \
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__high = __high / __base; \
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} \
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asm ("divl %2" : "=a" (__low), "=d" (__mod) \
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: "rm" (__base), "0" (__low), "1" (__upper)); \
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asm ("" : "=A" (n) : "a" (__low), "d" (__high)); \
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__mod; \
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})
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#define barrier() __asm__ __volatile__ ("" ::: "memory")
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static inline uint8_t inb(uint16_t port) __attribute__((always_inline));
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static inline uint16_t inw(uint16_t port) __attribute__((always_inline));
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static inline void insl(uint32_t port, void *addr, int cnt) __attribute__((always_inline));
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static inline void outb(uint16_t port, uint8_t data) __attribute__((always_inline));
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static inline void outw(uint16_t port, uint16_t data) __attribute__((always_inline));
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static inline void outsl(uint32_t port, const void *addr, int cnt) __attribute__((always_inline));
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static inline uint32_t read_ebp(void) __attribute__((always_inline));
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static inline void breakpoint(void) __attribute__((always_inline));
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static inline uint32_t read_dr(unsigned regnum) __attribute__((always_inline));
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static inline void write_dr(unsigned regnum, uint32_t value) __attribute__((always_inline));
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/* Pseudo-descriptors used for LGDT, LLDT(not used) and LIDT instructions. */
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struct pseudodesc {
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uint16_t pd_lim; // Limit
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uintptr_t pd_base; // Base address
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} __attribute__ ((packed));
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static inline void lidt(struct pseudodesc *pd) __attribute__((always_inline));
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static inline void sti(void) __attribute__((always_inline));
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static inline void cli(void) __attribute__((always_inline));
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static inline void ltr(uint16_t sel) __attribute__((always_inline));
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static inline uint32_t read_eflags(void) __attribute__((always_inline));
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static inline void write_eflags(uint32_t eflags) __attribute__((always_inline));
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static inline void lcr0(uintptr_t cr0) __attribute__((always_inline));
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static inline void lcr3(uintptr_t cr3) __attribute__((always_inline));
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static inline uintptr_t rcr0(void) __attribute__((always_inline));
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static inline uintptr_t rcr1(void) __attribute__((always_inline));
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static inline uintptr_t rcr2(void) __attribute__((always_inline));
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static inline uintptr_t rcr3(void) __attribute__((always_inline));
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static inline void invlpg(void *addr) __attribute__((always_inline));
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static inline uint8_t
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inb(uint16_t port) {
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uint8_t data;
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asm volatile ("inb %1, %0" : "=a" (data) : "d" (port) : "memory");
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return data;
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}
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static inline uint16_t
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inw(uint16_t port) {
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uint16_t data;
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asm volatile ("inw %1, %0" : "=a" (data) : "d" (port));
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return data;
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}
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static inline void
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insl(uint32_t port, void *addr, int cnt) {
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asm volatile (
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"cld;"
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"repne; insl;"
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: "=D" (addr), "=c" (cnt)
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: "d" (port), "0" (addr), "1" (cnt)
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: "memory", "cc");
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}
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static inline void
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outb(uint16_t port, uint8_t data) {
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asm volatile ("outb %0, %1" :: "a" (data), "d" (port) : "memory");
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}
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static inline void
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outw(uint16_t port, uint16_t data) {
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asm volatile ("outw %0, %1" :: "a" (data), "d" (port) : "memory");
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}
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static inline void
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outsl(uint32_t port, const void *addr, int cnt) {
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asm volatile (
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"cld;"
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"repne; outsl;"
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: "=S" (addr), "=c" (cnt)
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: "d" (port), "0" (addr), "1" (cnt)
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: "memory", "cc");
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}
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static inline uint32_t
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read_ebp(void) {
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uint32_t ebp;
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asm volatile ("movl %%ebp, %0" : "=r" (ebp));
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return ebp;
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}
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static inline void
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breakpoint(void) {
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asm volatile ("int $3");
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}
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static inline uint32_t
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read_dr(unsigned regnum) {
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uint32_t value = 0;
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switch (regnum) {
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case 0: asm volatile ("movl %%db0, %0" : "=r" (value)); break;
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case 1: asm volatile ("movl %%db1, %0" : "=r" (value)); break;
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case 2: asm volatile ("movl %%db2, %0" : "=r" (value)); break;
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case 3: asm volatile ("movl %%db3, %0" : "=r" (value)); break;
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case 6: asm volatile ("movl %%db6, %0" : "=r" (value)); break;
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case 7: asm volatile ("movl %%db7, %0" : "=r" (value)); break;
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}
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return value;
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}
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static void
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write_dr(unsigned regnum, uint32_t value) {
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switch (regnum) {
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case 0: asm volatile ("movl %0, %%db0" :: "r" (value)); break;
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case 1: asm volatile ("movl %0, %%db1" :: "r" (value)); break;
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case 2: asm volatile ("movl %0, %%db2" :: "r" (value)); break;
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case 3: asm volatile ("movl %0, %%db3" :: "r" (value)); break;
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case 6: asm volatile ("movl %0, %%db6" :: "r" (value)); break;
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case 7: asm volatile ("movl %0, %%db7" :: "r" (value)); break;
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}
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}
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static inline void
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lidt(struct pseudodesc *pd) {
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asm volatile ("lidt (%0)" :: "r" (pd) : "memory");
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}
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static inline void
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sti(void) {
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asm volatile ("sti");
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}
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static inline void
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cli(void) {
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asm volatile ("cli" ::: "memory");
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}
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static inline void
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ltr(uint16_t sel) {
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asm volatile ("ltr %0" :: "r" (sel) : "memory");
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}
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static inline uint32_t
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read_eflags(void) {
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uint32_t eflags;
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asm volatile ("pushfl; popl %0" : "=r" (eflags));
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return eflags;
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}
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static inline void
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write_eflags(uint32_t eflags) {
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asm volatile ("pushl %0; popfl" :: "r" (eflags));
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}
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static inline void
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lcr0(uintptr_t cr0) {
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asm volatile ("mov %0, %%cr0" :: "r" (cr0) : "memory");
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}
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static inline void
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lcr3(uintptr_t cr3) {
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asm volatile ("mov %0, %%cr3" :: "r" (cr3) : "memory");
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}
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static inline uintptr_t
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rcr0(void) {
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uintptr_t cr0;
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asm volatile ("mov %%cr0, %0" : "=r" (cr0) :: "memory");
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return cr0;
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}
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static inline uintptr_t
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rcr1(void) {
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uintptr_t cr1;
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asm volatile ("mov %%cr1, %0" : "=r" (cr1) :: "memory");
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return cr1;
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}
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static inline uintptr_t
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rcr2(void) {
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uintptr_t cr2;
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asm volatile ("mov %%cr2, %0" : "=r" (cr2) :: "memory");
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return cr2;
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}
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static inline uintptr_t
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rcr3(void) {
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uintptr_t cr3;
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asm volatile ("mov %%cr3, %0" : "=r" (cr3) :: "memory");
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return cr3;
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}
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static inline void
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invlpg(void *addr) {
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asm volatile ("invlpg (%0)" :: "r" (addr) : "memory");
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}
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static inline int __strcmp(const char *s1, const char *s2) __attribute__((always_inline));
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static inline char *__strcpy(char *dst, const char *src) __attribute__((always_inline));
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static inline void *__memset(void *s, char c, size_t n) __attribute__((always_inline));
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static inline void *__memmove(void *dst, const void *src, size_t n) __attribute__((always_inline));
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static inline void *__memcpy(void *dst, const void *src, size_t n) __attribute__((always_inline));
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#ifndef __HAVE_ARCH_STRCMP
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#define __HAVE_ARCH_STRCMP
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static inline int
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__strcmp(const char *s1, const char *s2) {
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int d0, d1, ret;
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asm volatile (
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"1: lodsb;"
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"scasb;"
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"jne 2f;"
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"testb %%al, %%al;"
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"jne 1b;"
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"xorl %%eax, %%eax;"
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"jmp 3f;"
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"2: sbbl %%eax, %%eax;"
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"orb $1, %%al;"
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"3:"
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: "=a" (ret), "=&S" (d0), "=&D" (d1)
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: "1" (s1), "2" (s2)
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: "memory");
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return ret;
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}
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#endif /* __HAVE_ARCH_STRCMP */
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#ifndef __HAVE_ARCH_STRCPY
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#define __HAVE_ARCH_STRCPY
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static inline char *
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__strcpy(char *dst, const char *src) {
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int d0, d1, d2;
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asm volatile (
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"1: lodsb;"
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"stosb;"
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"testb %%al, %%al;"
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"jne 1b;"
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: "=&S" (d0), "=&D" (d1), "=&a" (d2)
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: "0" (src), "1" (dst) : "memory");
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return dst;
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}
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#endif /* __HAVE_ARCH_STRCPY */
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#ifndef __HAVE_ARCH_MEMSET
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#define __HAVE_ARCH_MEMSET
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static inline void *
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__memset(void *s, char c, size_t n) {
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int d0, d1;
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asm volatile (
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"rep; stosb;"
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: "=&c" (d0), "=&D" (d1)
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: "0" (n), "a" (c), "1" (s)
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: "memory");
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return s;
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}
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#endif /* __HAVE_ARCH_MEMSET */
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#ifndef __HAVE_ARCH_MEMMOVE
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#define __HAVE_ARCH_MEMMOVE
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static inline void *
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__memmove(void *dst, const void *src, size_t n) {
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if (dst < src) {
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return __memcpy(dst, src, n);
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}
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int d0, d1, d2;
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asm volatile (
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"std;"
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"rep; movsb;"
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"cld;"
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: "=&c" (d0), "=&S" (d1), "=&D" (d2)
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: "0" (n), "1" (n - 1 + src), "2" (n - 1 + dst)
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: "memory");
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return dst;
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}
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#endif /* __HAVE_ARCH_MEMMOVE */
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#ifndef __HAVE_ARCH_MEMCPY
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#define __HAVE_ARCH_MEMCPY
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static inline void *
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__memcpy(void *dst, const void *src, size_t n) {
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int d0, d1, d2;
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asm volatile (
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"rep; movsl;"
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"movl %4, %%ecx;"
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"andl $3, %%ecx;"
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"jz 1f;"
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"rep; movsb;"
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"1:"
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: "=&c" (d0), "=&D" (d1), "=&S" (d2)
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: "0" (n / 4), "g" (n), "1" (dst), "2" (src)
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: "memory");
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return dst;
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}
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#endif /* __HAVE_ARCH_MEMCPY */
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#endif /* !__LIBS_X86_H__ */
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