《操作系统》的实验代码。
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12 years ago
  1. #ifndef __LIBS_X86_H__
  2. #define __LIBS_X86_H__
  3. #include <defs.h>
  4. #define do_div(n, base) ({ \
  5. unsigned long __upper, __low, __high, __mod, __base; \
  6. __base = (base); \
  7. asm ("" : "=a" (__low), "=d" (__high) : "A" (n)); \
  8. __upper = __high; \
  9. if (__high != 0) { \
  10. __upper = __high % __base; \
  11. __high = __high / __base; \
  12. } \
  13. asm ("divl %2" : "=a" (__low), "=d" (__mod) \
  14. : "rm" (__base), "0" (__low), "1" (__upper)); \
  15. asm ("" : "=A" (n) : "a" (__low), "d" (__high)); \
  16. __mod; \
  17. })
  18. #define barrier() __asm__ __volatile__ ("" ::: "memory")
  19. static inline uint8_t inb(uint16_t port) __attribute__((always_inline));
  20. static inline uint16_t inw(uint16_t port) __attribute__((always_inline));
  21. static inline void insl(uint32_t port, void *addr, int cnt) __attribute__((always_inline));
  22. static inline void outb(uint16_t port, uint8_t data) __attribute__((always_inline));
  23. static inline void outw(uint16_t port, uint16_t data) __attribute__((always_inline));
  24. static inline void outsl(uint32_t port, const void *addr, int cnt) __attribute__((always_inline));
  25. static inline uint32_t read_ebp(void) __attribute__((always_inline));
  26. static inline void breakpoint(void) __attribute__((always_inline));
  27. static inline uint32_t read_dr(unsigned regnum) __attribute__((always_inline));
  28. static inline void write_dr(unsigned regnum, uint32_t value) __attribute__((always_inline));
  29. /* Pseudo-descriptors used for LGDT, LLDT(not used) and LIDT instructions. */
  30. struct pseudodesc {
  31. uint16_t pd_lim; // Limit
  32. uintptr_t pd_base; // Base address
  33. } __attribute__ ((packed));
  34. static inline void lidt(struct pseudodesc *pd) __attribute__((always_inline));
  35. static inline void sti(void) __attribute__((always_inline));
  36. static inline void cli(void) __attribute__((always_inline));
  37. static inline void ltr(uint16_t sel) __attribute__((always_inline));
  38. static inline uint32_t read_eflags(void) __attribute__((always_inline));
  39. static inline void write_eflags(uint32_t eflags) __attribute__((always_inline));
  40. static inline void lcr0(uintptr_t cr0) __attribute__((always_inline));
  41. static inline void lcr3(uintptr_t cr3) __attribute__((always_inline));
  42. static inline uintptr_t rcr0(void) __attribute__((always_inline));
  43. static inline uintptr_t rcr1(void) __attribute__((always_inline));
  44. static inline uintptr_t rcr2(void) __attribute__((always_inline));
  45. static inline uintptr_t rcr3(void) __attribute__((always_inline));
  46. static inline void invlpg(void *addr) __attribute__((always_inline));
  47. static inline uint8_t
  48. inb(uint16_t port) {
  49. uint8_t data;
  50. asm volatile ("inb %1, %0" : "=a" (data) : "d" (port) : "memory");
  51. return data;
  52. }
  53. static inline uint16_t
  54. inw(uint16_t port) {
  55. uint16_t data;
  56. asm volatile ("inw %1, %0" : "=a" (data) : "d" (port));
  57. return data;
  58. }
  59. static inline void
  60. insl(uint32_t port, void *addr, int cnt) {
  61. asm volatile (
  62. "cld;"
  63. "repne; insl;"
  64. : "=D" (addr), "=c" (cnt)
  65. : "d" (port), "0" (addr), "1" (cnt)
  66. : "memory", "cc");
  67. }
  68. static inline void
  69. outb(uint16_t port, uint8_t data) {
  70. asm volatile ("outb %0, %1" :: "a" (data), "d" (port) : "memory");
  71. }
  72. static inline void
  73. outw(uint16_t port, uint16_t data) {
  74. asm volatile ("outw %0, %1" :: "a" (data), "d" (port) : "memory");
  75. }
  76. static inline void
  77. outsl(uint32_t port, const void *addr, int cnt) {
  78. asm volatile (
  79. "cld;"
  80. "repne; outsl;"
  81. : "=S" (addr), "=c" (cnt)
  82. : "d" (port), "0" (addr), "1" (cnt)
  83. : "memory", "cc");
  84. }
  85. static inline uint32_t
  86. read_ebp(void) {
  87. uint32_t ebp;
  88. asm volatile ("movl %%ebp, %0" : "=r" (ebp));
  89. return ebp;
  90. }
  91. static inline void
  92. breakpoint(void) {
  93. asm volatile ("int $3");
  94. }
  95. static inline uint32_t
  96. read_dr(unsigned regnum) {
  97. uint32_t value = 0;
  98. switch (regnum) {
  99. case 0: asm volatile ("movl %%db0, %0" : "=r" (value)); break;
  100. case 1: asm volatile ("movl %%db1, %0" : "=r" (value)); break;
  101. case 2: asm volatile ("movl %%db2, %0" : "=r" (value)); break;
  102. case 3: asm volatile ("movl %%db3, %0" : "=r" (value)); break;
  103. case 6: asm volatile ("movl %%db6, %0" : "=r" (value)); break;
  104. case 7: asm volatile ("movl %%db7, %0" : "=r" (value)); break;
  105. }
  106. return value;
  107. }
  108. static void
  109. write_dr(unsigned regnum, uint32_t value) {
  110. switch (regnum) {
  111. case 0: asm volatile ("movl %0, %%db0" :: "r" (value)); break;
  112. case 1: asm volatile ("movl %0, %%db1" :: "r" (value)); break;
  113. case 2: asm volatile ("movl %0, %%db2" :: "r" (value)); break;
  114. case 3: asm volatile ("movl %0, %%db3" :: "r" (value)); break;
  115. case 6: asm volatile ("movl %0, %%db6" :: "r" (value)); break;
  116. case 7: asm volatile ("movl %0, %%db7" :: "r" (value)); break;
  117. }
  118. }
  119. static inline void
  120. lidt(struct pseudodesc *pd) {
  121. asm volatile ("lidt (%0)" :: "r" (pd) : "memory");
  122. }
  123. static inline void
  124. sti(void) {
  125. asm volatile ("sti");
  126. }
  127. static inline void
  128. cli(void) {
  129. asm volatile ("cli" ::: "memory");
  130. }
  131. static inline void
  132. ltr(uint16_t sel) {
  133. asm volatile ("ltr %0" :: "r" (sel) : "memory");
  134. }
  135. static inline uint32_t
  136. read_eflags(void) {
  137. uint32_t eflags;
  138. asm volatile ("pushfl; popl %0" : "=r" (eflags));
  139. return eflags;
  140. }
  141. static inline void
  142. write_eflags(uint32_t eflags) {
  143. asm volatile ("pushl %0; popfl" :: "r" (eflags));
  144. }
  145. static inline void
  146. lcr0(uintptr_t cr0) {
  147. asm volatile ("mov %0, %%cr0" :: "r" (cr0) : "memory");
  148. }
  149. static inline void
  150. lcr3(uintptr_t cr3) {
  151. asm volatile ("mov %0, %%cr3" :: "r" (cr3) : "memory");
  152. }
  153. static inline uintptr_t
  154. rcr0(void) {
  155. uintptr_t cr0;
  156. asm volatile ("mov %%cr0, %0" : "=r" (cr0) :: "memory");
  157. return cr0;
  158. }
  159. static inline uintptr_t
  160. rcr1(void) {
  161. uintptr_t cr1;
  162. asm volatile ("mov %%cr1, %0" : "=r" (cr1) :: "memory");
  163. return cr1;
  164. }
  165. static inline uintptr_t
  166. rcr2(void) {
  167. uintptr_t cr2;
  168. asm volatile ("mov %%cr2, %0" : "=r" (cr2) :: "memory");
  169. return cr2;
  170. }
  171. static inline uintptr_t
  172. rcr3(void) {
  173. uintptr_t cr3;
  174. asm volatile ("mov %%cr3, %0" : "=r" (cr3) :: "memory");
  175. return cr3;
  176. }
  177. static inline void
  178. invlpg(void *addr) {
  179. asm volatile ("invlpg (%0)" :: "r" (addr) : "memory");
  180. }
  181. static inline int __strcmp(const char *s1, const char *s2) __attribute__((always_inline));
  182. static inline char *__strcpy(char *dst, const char *src) __attribute__((always_inline));
  183. static inline void *__memset(void *s, char c, size_t n) __attribute__((always_inline));
  184. static inline void *__memmove(void *dst, const void *src, size_t n) __attribute__((always_inline));
  185. static inline void *__memcpy(void *dst, const void *src, size_t n) __attribute__((always_inline));
  186. #ifndef __HAVE_ARCH_STRCMP
  187. #define __HAVE_ARCH_STRCMP
  188. static inline int
  189. __strcmp(const char *s1, const char *s2) {
  190. int d0, d1, ret;
  191. asm volatile (
  192. "1: lodsb;"
  193. "scasb;"
  194. "jne 2f;"
  195. "testb %%al, %%al;"
  196. "jne 1b;"
  197. "xorl %%eax, %%eax;"
  198. "jmp 3f;"
  199. "2: sbbl %%eax, %%eax;"
  200. "orb $1, %%al;"
  201. "3:"
  202. : "=a" (ret), "=&S" (d0), "=&D" (d1)
  203. : "1" (s1), "2" (s2)
  204. : "memory");
  205. return ret;
  206. }
  207. #endif /* __HAVE_ARCH_STRCMP */
  208. #ifndef __HAVE_ARCH_STRCPY
  209. #define __HAVE_ARCH_STRCPY
  210. static inline char *
  211. __strcpy(char *dst, const char *src) {
  212. int d0, d1, d2;
  213. asm volatile (
  214. "1: lodsb;"
  215. "stosb;"
  216. "testb %%al, %%al;"
  217. "jne 1b;"
  218. : "=&S" (d0), "=&D" (d1), "=&a" (d2)
  219. : "0" (src), "1" (dst) : "memory");
  220. return dst;
  221. }
  222. #endif /* __HAVE_ARCH_STRCPY */
  223. #ifndef __HAVE_ARCH_MEMSET
  224. #define __HAVE_ARCH_MEMSET
  225. static inline void *
  226. __memset(void *s, char c, size_t n) {
  227. int d0, d1;
  228. asm volatile (
  229. "rep; stosb;"
  230. : "=&c" (d0), "=&D" (d1)
  231. : "0" (n), "a" (c), "1" (s)
  232. : "memory");
  233. return s;
  234. }
  235. #endif /* __HAVE_ARCH_MEMSET */
  236. #ifndef __HAVE_ARCH_MEMMOVE
  237. #define __HAVE_ARCH_MEMMOVE
  238. static inline void *
  239. __memmove(void *dst, const void *src, size_t n) {
  240. if (dst < src) {
  241. return __memcpy(dst, src, n);
  242. }
  243. int d0, d1, d2;
  244. asm volatile (
  245. "std;"
  246. "rep; movsb;"
  247. "cld;"
  248. : "=&c" (d0), "=&S" (d1), "=&D" (d2)
  249. : "0" (n), "1" (n - 1 + src), "2" (n - 1 + dst)
  250. : "memory");
  251. return dst;
  252. }
  253. #endif /* __HAVE_ARCH_MEMMOVE */
  254. #ifndef __HAVE_ARCH_MEMCPY
  255. #define __HAVE_ARCH_MEMCPY
  256. static inline void *
  257. __memcpy(void *dst, const void *src, size_t n) {
  258. int d0, d1, d2;
  259. asm volatile (
  260. "rep; movsl;"
  261. "movl %4, %%ecx;"
  262. "andl $3, %%ecx;"
  263. "jz 1f;"
  264. "rep; movsb;"
  265. "1:"
  266. : "=&c" (d0), "=&D" (d1), "=&S" (d2)
  267. : "0" (n / 4), "g" (n), "1" (dst), "2" (src)
  268. : "memory");
  269. return dst;
  270. }
  271. #endif /* __HAVE_ARCH_MEMCPY */
  272. #endif /* !__LIBS_X86_H__ */